Lead Engineer – RTL Design (Wireless Modem IP)

Silicon Labs (NASDAQ: SLAB) is the leading innovator in low-power wireless connectivity, building embedded technology that connects devices and improves lives. Merging cutting-edge technology into the world’s most highly integrated SoCs, Silicon Labs provides device makers the solutions, support, and ecosystems needed to create advanced edge connectivity applications. Headquartered in Austin, Texas, Silicon Labs has operations in over 16 countries and is the trusted partner for innovative solutions in the smart home, industrial IoT, and smart cities markets. Learn more at www.silabs.com. The Role In this role, you will design and develop high-performance, power-efficient RTL for wireless modem IPs that enable Wi-Fi and low-power IoT devices. You will work on digital baseband and PHY-layer signal processing blocks, contributing to the development of reliable and scalable wireless solutions used across a wide range of connected products. This is a great opportunity for an experienced RTL Design Engineer who enjoys working on complex digital designs, solving challenging technical problems, and owning IP development from microarchitecture through integration and verification. Meet the Team Our Modem team develops digital baseband and PHY-layer IPs that power Silicon Labs' wireless connectivity solutions. The team works on designing and integrating high-performance, low-power modem components that support Wi-Fi and other wireless IoT technologies. You will collaborate closely with modem system engineers, design verification engineers, and SoC teams to develop robust modem IPs and ensure seamless integration into our wireless SoCs. Responsibilities As an RTL Design Engineer on the Modem team, you will: Design and develop synthesizable, high-quality RTL for wireless modem digital baseband and PHY-layer signal processing blocks. Define microarchitecture and implement DSP modules such as FIR filters, correlators, FFTs, and FEC decoders. Optimize RTL designs to meet Power, Performance, and Area (PPA) requirements. Develop module-level and subsystem-level testbenches and execute verification plans to ensure functional correctness. Participate in microarchitecture discussions, design reviews, and documentation of IP functionality and timing interfaces. Perform design quality checks, including Lint, CDC, RDC, and synthesis readiness. Collaborate with verification engineers to develop test plans, achieve coverage closure, and resolve functional issues. Work closely with modem systems, analog, and SoC teams to support IP integration and cross-functional debugging. Drive design quality and contribute to the successful delivery of modem IPs. Skills You Will Need Bachelor's or Master's degree in Electrical Engineering, Electronics, Communication Engineering, or a related field. 7–15 years of experience in digital RTL design, preferably involving wireless modem baseband or PHY-layer signal processing.