Principal Engineer - Verification

Microchiphr · India - Bangalore

India - Bangalore8–12 yearsPosted 30 Oct 2026Last checked 13 Nov 2026

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About the role

Are you looking for a unique opportunity to be a part of something great? Want to join a 17,000-member team that works on the technology that powers the world around us? Looking for an atmosphere of trust, empowerment, respect, diversity, and communication? How about an opportunity to own a piece of a multi-billion dollar (with a B!) global organization? We offer all that and more at Microchip Technology Inc. People come to work at Microchip because we help design the technology that runs the world. They stay because our culture supports their growth and stability. They are challenged and driven by an incredible array of products and solutions with unlimited career potential. Microchip’s nationally-recognized Leadership Passage Programs support career growth where we proudly enroll over a thousand people annually. We take pride in our commitment to employee development, values-based decision making, and strong sense of community, driven by our Vision, Mission, and 11 Guiding Values; we affectionately refer to it as the Aggregate System and it’s won us countless awards for diversity and workplace excellence. Our company is built by dedicated team players who love to challenge the status quo; we did not achieve record revenue and over 30 years of quarterly profitability without a great team dedicated to empowering innovation. People like you. Visit our careers page to see what exciting opportunities and company perks await! Job Description: As a Principal PCIe Verification Engineer, you will drive the verification strategy and technical execution for advanced PCIe protocols (Gen6 and beyond). You will design robust, scalable testbench architectures and lead a team of verification engineers to deliver project milestones. You will also bring modern AI tools and methodologies into the verification workflow to improve productivity and ensure high-quality, silicon-ready designs. Job Responsibilities Drive the verification strategy and technical execution for advanced PCIe protocols. Design robust, scalable testbench (TB) architectures and author comprehensive verification plans. Develop functional coverage models and write complex system assertions to ensure design quality. Mentor, support and lead a team of verification engineers to achieve project milestones. Integrate modern AI tools and methodologies into the verification workflow to improve productivity. Requirements/Qualifications: Required Qualifications Bachelor's/Master's degree in Electronics/VLSI Engineering with 8–12 years of industry experience in front-end verification. Deep theoretical knowledge and hands-on experience with PCIe Gen6 and subsequent generations. Mastery of SystemVerilog, Verilog and UVM-based testbench development. Strong knowledge of AMBA protocols, preferably AXI. Strong foundation in digital electronics and core verification concepts. Hands-on experience with any of the Cadence, Synopsys or Avery VIPs.

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