ASIC Design Engineer, GPU Core Pipeline IP

NVIDIA is seeking a highly enthusiastic and motivated Design Engineer to design and implement the next generation of control subsystems for the world’s leading GPUs. This position offers the opportunity to have real impact in a dynamic, technology-focused company impacting product lines ranging from consumer graphics to self-driving cars and the growing field of artificial intelligence. We have crafted a team of outstanding people stretching around the globe, whose mission is to push the frontiers of what is possible today and define the platform for the future of computing. At NVIDIA, our employees are passionate about parallel and visual computing. We are united in our quest to transform the way graphics are used to solve some of the most complex problems in computer science. The GPU started out as an engine for simulating human imagination, conjuring up the amazing virtual worlds of video games and Hollywood films. Today, NVIDIA’s GPU simulates human intelligence, running deep learning algorithms and acting as the brain of computers, robots, and self-driving cars that can perceive and understand the world. NVIDIA is increasingly known as “the AI computing company.” What you'll be doing: As a key member of our ASIC Design team, you will contribute to the design and implementation of graphics and compute features within an IP. You will be responsible for the micro-architecture and RTL design of GPU ASICs, working closely with architecture, verification and physical design teams to deliver high-quality designs. You will develop RTL using Verilog/SystemVerilog, collaborate on design specifications, and ensure that designs meet performance, power, area, and timing goals. Work with HW architects and designers to make the right implementation choices. Collaborate with verification engineers to ensure comprehensive validation and coverage of all implemented functionality. You will be working with architects, verification engineers, and other members of your design teams to accomplish your tasks. Participate in silicon bring-up, post-silicon debug, and performance analysis as needed. What we need to see: B.Tech./ M.Tech. with 3+ years of relevant experience. Familiarity with Verilog, C++ and OOPs concepts. Experience in RTL design and micro-architecture development at the unit or subsystem level. Good understanding of digital design fundamentals, including synchronous design, timing, and clock/reset methodologies. Good understanding of computer architecture concepts. Strong technical fundamentals with superior analytical and problem-solving skills. Knowledge of SystemVerilog and ASIC design methodologies is highly desirable. Exposure to industry-standard design, simulation, and debug tools. Ways to stand out from the crowd: Prior experience in 3D graphics processing or processor design. C/C++ programming language experience. Experience in scripting and tool development using Perl and Python. Excellent debugging skills.